Post by Frank Weg
But I was just wondering if anyone knew if it's literally safe to have just
the data cable on a disk?
AFAIK, SATA data lanes are capacitively coupled.
Leaving the cable connected, shouldn't leave DC bias
TX+ ---||-------------------- RX+
TX- ---||-------------------- RX-
RX+ --------------------||--- TX+
RX- --------------------||--- TX-
That's reasonably fool-proof. ESD still wouldn't
be very healthy for it.
Since the PCB on disk drives is turned upside-down,
it's not possible to easily verify this by visual examination
near the connector say (i.e. look for the two matched caps).
On modern drives, you can only see the solder-side.
In years past, data connections between subsystems were
DC-coupled. If the power went off on one subsystem,
current would flow from CMOS I/Os on the powered systems,
into the unpowered systems. Sufficient current can flow,
to charge the rails on the unpowered subsystem, and it
continues to run.
We got a great demo in the lab one day. Our resident genius
in the lab, he was in charge of thinking up crazy failure
scenarios. So while we're watching, he shuts off the power
on something he's not supposed to shut off. And... the
second subsystem, the status LEDs are *still* lit, and
"sane looking". The subsystem runs off a 5V supply, and
the DC leakage from the powered system managed to charge
the rails in the unpowered subsystem to 3.6V, which was
barely enough to cause it to be fully functional and
running! It was funny as hell. Especially the look
on his face, when it doesn't (really) shut off...
Today, if called upon, we fix that with transmission
gates, and those can cut off the current flow. With
an extra I/O delay of 250pS or so.
If the coding scheme allows it, being able to capacitively
couple the I/O is a nicer kind of bound. Some early fiber
optics bits and pieces, used to use 8B10B for that reason,
making receiver design a bit easier (receiver doesn't have
to work all the way down to DC).
PCI Express has switched to 128b/130b for revision 3, but
I don't know what that means for the spectrum of the signals
as it's running. It's probably still capacitively coupled.
My guess is, the electrical properties aren't going to be
nearly as nice. Since all the standards tend to evolve and
share ideas at the same time, you'd expect SATA to be
tempted to do that also.
And that coding scheme is stretched pretty far. If
they no longer like that one, the next option would be
"scramblers". Which have almost zero overhead, and the
properties aren't nicely bounded.